1. Field of the Invention
The invention relates to a semiconductor device which is capable of forming a system by connecting blocks or modules included in a package or chips and, in particular, a semiconductor device which can be designed flexibly and which can render a design unit in a proper size.
2. Description of the Related Art
In recent years, such a semiconductor has been used as a system LSI in a product, such as a set-top box, a game device, or a digital camera. On the other hand, the product has been required to be small in size, consume less power, and be made at reduced cost.
However, the system LSI is made for each specific art and does not suit for a general-purpose use. Therefore, timing is critical when the LSI is supplied in a market. To this end, a short design period and a short turn around time (TAT) are recently required on designing and manufacturing the LSI.
Also, a degree of integration and performance of the LSI has been remarkably improved in several years. In addition, integration for achieving various functions is needed since the LSI must treat multimedia data including image data and sound data.
Further, a design of the LSI has been more complicated. In order to overcome the complexity, a method is adopted which integrates large-scale macro cells each of which is previously designed. The macro cell is referred to as IP (Intellectual Property), as known in the art.
Thus, the period required to design the LSI is considerably shortened, but it is difficult to prepare and hold all IPs corresponding to many various functions by a single company, even if it is a large company. There are IP providers who design and provide IPs to solve the above problem.
To easily construct the LSI by combining these IPs, a flexibility of the IP must be enhanced and a common interface of the IP must be needed. Then, “VSI (Virtual Socket Interface)” is organized and wherein, a unification of a design environment including IPs is fostered on trial. By the unification, it is possible to construct a system on the LSI by connecting via a common bus various IPs available from many LSI design companies which are different from each other.
For example, there may be a first conventional system in which a core processor and peripheral processors connected via the core processor are arranged on a chip.
In the first conventional system, a connection between process modules is critical and a wiring of the modules is performed over multi-layers. As a result, complexity of the system is increased. Also, when a change of a design of one of the process modules is required, a wiring must be changed. And the change for one module leads to a change of a design of the whole LSI and that is expensive.
To solve this problem, an LSI is proposed which incorporates a communication function to enhance its independency and realize a system having communicating ability Via a network.
For example, a second conventional system is disclosed in JP-Y2 07-46992 (JP-Y 46992/1995). The system (a communication function built-in type LSI) incorporates a communication interface and also serves as a gateway.
However, in the second conventional system, the problem of complexity due to a wiring between elements of the system and an arrangement of the elements has still remained.
The problem becomes serious when a number of chips are arranged in a multi-chip module as processing elements and they are connected via a common bus (first conventional system), or when a number of chips (each of which is an LSI incorporating a communication function) are arranged in a sub network of a system as processing elements and they are connected via a single network bus (second conventional system). In these cases, design of the systems is still complicated, since a distance between chips to be connected is determined based on locations of the chips and a location of a wiring connecting the chips.